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Your SSD does not store your files where you think it does

You have a folder on your desktop and, inside it, a file. The filesystem tells you it lives at logical address 4,812,003. You believe it. Your SSD does not. The moment that information reaches the drive, the controller translates it to a physical cell different from the one it used last time, and rewrites its internal map again. An SSD never stores the same piece of data twice in the same place, and everything strange about these drives —that they wear down over the years, that “delete” does not delete, that they choke on bulk copies— comes straight out of that design decision.

What is inside the case

An SSD is not a big USB stick. Inside there are three things: one or more NAND flash memory chips, a controller (a small processor running its own firmware) and a varying amount of DRAM or SRAM acting as cache. NAND is organised into dies, each die into planes, each plane into erase blocks of between 4 and 16 MB, and each block into pages of 4 to 16 KB.

The brutal asymmetry is right there: you can write and read in page units —usually 16 KB on TLC blocks, 4 KB on SLC— but you can only erase whole blocks. And each cell survives a finite number of program-and-erase cycles before it fails: around 100,000 on SLC, between 3,000 and 10,000 on MLC, and between 500 and 3,000 on TLC, the type that dominates the consumer market today. On QLC, where each cell stores four bits across sixteen distinct voltage levels, the figure drops further, and reading each level correctly means telling apart differences of tens of millivolts.

The FTL: the map that keeps rewriting itself

The operating system works with logical addresses (LBAs) and does not care where they end up. The component that knows the truth is the Flash Translation Layer, a firmware layer that maintains a logical→physical mapping table. That table is stored in the NAND itself and loaded partially into RAM at boot; on heavily loaded drives the table alone can take several MB, which is one reason DRAM-less SSDs stutter on random writes.

Writing a sector, then, is not modifying anything: it is programming a clean page in another block, pointing the LBA to that new page in the table and marking the old one invalid. This process is called an out-of-place write and it is the heart of everything else.

Garbage, collection and amplification

Because old data ends up scattered and flagged but cannot be erased individually, the controller needs to tidy up. Garbage collection picks a block with plenty of invalid pages, copies the ones still valid into a new block and only then erases the whole block. If that block had valid pages scattered around, the firmware ends up writing far more than the user asked for: the ratio between bytes written to the NAND and useful bytes is called write amplification (WAF). A WAF of 3 means every MB you write costs 3 MB of real wear.

This is why over-provisioning exists: between 7 % and 25 % of the drive’s capacity is never offered to the user, and serves as room for the garbage collector to copy without blocking the system. It is also why TRIM (or discard on Linux) exists: when you delete a file, the filesystem tells the SSD which pages no longer hold anything. Without that signal, the collector copies already-dead data as if it were valid, inflates the WAF and shortens the drive’s life. An SSD without TRIM degrading over the months is the classic pattern people read as “the drive is dying”.

Wear levelling and cold data

If the firmware always wrote to the same blocks, some would die far earlier than others. Dynamic wear levelling spreads writes across all free blocks; static wear levelling goes further and moves old data that has not been touched in years —so-called cold data— to spread wear even across cells that are never used. It costs extra writes in exchange for lifespan: another reason WAF is never 1.

NVMe is not a faster SSD, it is another protocol

The jump from SATA to NVMe is about architecture more than raw speed. AHCI, designed for mechanical drives, offers a single queue with 32 commands and one interrupt register. NVMe (over PCIe) allows up to 65,535 queues, each with 65,535 commands, and routes each one to a different CPU core. A drive with sixteen channels to the NAND can serve in parallel the accesses SATA used to serialise. Add to that the fact that the controller corrects errors with LDPC codes instead of classic BCH ECC, because on TLC and QLC the voltage margins are so narrow that error correction is part of normal operation, not the exception.

What the operating system thinks it sees

In the end, your machine still sees a block device with 512 B or 4 KB sectors and numbered addresses. That model is a useful fiction: the SSD keeps it standing with layers of translation, write caching and deferred erasure. It works for everything except one uncomfortable conclusion: on this kind of drive, a piece of data is not in a place — it is pointed at in a map. And maps get rewritten every time you write.